Electrical and Computer Engineering, McGill University
SOME RESEARCH INTERESTS
Bio-Inspired Human Brain-Scale Neural Emulator
We are interested in building a machine that will be able to emulate the human brain. Where, potentially, personalized brain models are upload into the machine. The emulator will be able to receive external stimuli and propagate the signals across the neural network. This emulator will help understand connectivity-related neural diseases (e.g., epilepsy). This is a highly interdisciplinary research that requires a broad spectrum of knowledge, from device, through circuits, architecture, machine learning and artificial intelligence, software, and the actual structure of the brain. We collaborate with colleagues across disciplines to accomplish this ambitious goal.
Interconnects and Communication
Communicating signals among multiple vertically stacked dies or across an entire wafer is a complex task. In some cases simple node-to-node signaling is possible, in other cases, a network supporting soft communication protocols is required.
Test and System Yield
Some systems can tolerate defects, others must be 100% proof tested. Developing self-test schemes to ensure high system-level yield within (non-reworkable) heterogeneous platforms is key to enable successful adoption of technology.
Power Delivery and Thermal Management
Delivering power to a heterogeneous system is a significant challenge due to the diversity of specifications. Managing the thermal budget of such systems makes it an even greater challenge. We like challenges.
Applications and Prototyping
Identifying the right integration platform for a certain application is imperative. Many modern applications are expected to be highly diverse and therefore of interest to us. Prototyping such applications is an important focus of our research.
CURRENT PROJECTS
Hardware Obfuscation Using Wafer Integration
We separate fabrication of front-end-of-line (FEOL) and back-end-of-line (BEOL) using independent foundries. We then integrate the two parts of the circuit using advanced wafer-scale integration. This enables hardware obfuscation as no single foundry has access to the entire circuit.
Power Delivery Methodology for Si-IF
We are formulating a power delivery methodology to ensure distribution of high quality of power to a large heterogeneous system-on-wafer using the network on IF approach. We are tackling critical issues related to decoupling capacitance, thermal dissipation, and interconnect dimensions, within a heterogeneous pool of specifications.
Machine-Learning Assisted Thermal-Aware Floorplanning for 3-D ICs
We utilize machine learning to develop an efficient floorplanning methodology for three-dimensional systems. We consider classical constraints, such as area and wirelength, but also focus on one of the key challenges of 3-D ICs - thermal congestion and thermal interactions among system components.
Communication Protocols for Ultra-Large-Scale Heterogenous Systems
We are modeling synaptic communication in the brain and mapping it into a flexible ultra-large heterogeneous platform. We want to prototype this system as a stepping stone to a brain-scale neural network.